Publikationen

• Markus Weinhardt, Mohamed Messelka, and Philipp Käsgen: CHiPReP - A Compiler for the HiPReP High-Performance Reconfigurable Processor, Electronics, Vol. 10, No. 21, Oct. 2021, MDPI (Open Access)
• Markus Weinhardt, Bernhard Lang, Frank M Thiesing, Alexander Krieger, and Thomas Kinder: SAccO: An implementation platform for scalable FPGA accelerators, Microprocessors and Microsystems, Vol. 39, Issue 7, pp. 543-552 (2015), Elsevier (DOI)
• J. M. P. Cardoso, P. Diniz, and M. Weinhardt: Compiling for Reconfigurable Computing - A Survey, ACM Computing Surveys, Vol. 42, No. 4, June 2010, Association for Computing Machinery, USA
• V. Baumgarte, G. Ehlers, F. May, A. Nückel, M. Vorbach, and M. Weinhardt: PACT XPP - A Self-Reconfigurable Data Processing Architecture, The Journal of Supercomputing, Vol. 26, No. 2, Sept. 2003, Kluwer Academic Publishers
• M. Weinhardt and W. Luk: Memory access optimisation for reconfigurable systems , IEE Proceedings Computers and Digital Techniques, Vol. 148, No. 3, May 2001
• M. Weinhardt and W. Luk: Pipeline Vectorization , IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Feb. 2001

• Chr. Hochberger, D. Koch and M. Weinhardt (editors): Proceedings "Sixth International Workshop on FPGAs for Software Programmers (FSP 2019)", VDE-Verlag, 2019
• Chr. Hochberger, A. Koch and M. Weinhardt (editors): Proceedings "Fifth International Workshop on FPGAs for Software Programmers (FSP 2018)", VDE-Verlag, 2018
• Chr. Hochberger, A. Koch and M. Weinhardt (editors): Proceedings "Fourth International Workshop on FPGAs for Software Programmers (FSP 2017)", VDE-Verlag, 2017
• Chr. Hochberger, A. Koch and M. Weinhardt (editors): Proceedings "Third International Workshop on FPGAs for Software Programmers (FSP 2016)", VDE-Verlag, 2016
• J. M. P. Cardoso and M. Weinhardt: Chapter 2: "High-Level Synthesis", in "FPGAs for Software Programmers" (editors: D. Koch, F. Hannig, and D. Ziener), Springer, 2016
• E. Schüler and M. Weinhardt: Chapter 6: "XPP-III - The XPP-III Reconfigurable Processing Core", in "Dynamic System Reconfiguration in Heterogeneous Platforms - The MORPHEUS Approach" (editors: N. Voros, A. Rosti, M. Hübner), Springer, Dordrecht, NL, 2009
• J. M. P. Cardoso and M. Weinhardt: Chapter 9: "Compilation and Temporal Partitioning for a Coarse-Grain Reconfigurable Architecture", in "New Algorithms, Architectures and Applications for Reconfigurable Computing" (editors: P. Lysaght, W. Rosenstiel), Springer, Dordrecht, NL, 2005

• M. Weinhardt: An Analysis of Mapping Polybench Kernels to HPC CGRAs, Proc. of the First International Workshop on Coarse-Grained Reconfigurable Architectures for High-Performance Computing (CGRA4HPC), May 2022
• Ph. Käsgen, M. Messelka, M. Weinhardt: HiPReP: High-Performance Reconfigurable Processor - Architecture and Compiler, Proc. of the 31st International Conference on Field-Programmable Logic and Applications (FPL 2021), Sept. 2021
• M. Weinhardt: High-Level Synthesis Oriented Restructuring of Functions with While Loops, Proceedings of the 26th Reconfigurable Architectures Workshop (RAW 2019), Rio de Janeiro, Brasil, May 2019
• Ph. Käsgen, M. Weinhardt, Chr. Hochberger: Dynamic Scheduling of Pipelined Functional Units in Coarse-Grained Reconfigurable Array Elements, Proc. of the 2019 International Conference on Architecture of Computing Systems (ARCS 2019), Copenhagen, Denmark, May 2019
• Ph. Käsgen, M. Weinhardt, Chr. Hochberger: A Coarse-Grained Reconfigurable Array for High-Performance Computing Applications, Proc. of the 2018 International Conference on ReConFigurable Computing and FPGAs (ReConFig 2018), Cancun, Mexiko, Dec. 2018
• Ph. Käsgen and M. Weinhardt: Using Template Metaprogramming for Hardware Description, Proc. 21. Workshop "Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen", Universität Tübingen, März 2018
• M. Weinhardt: Comparing Register-Transfer-, C-, and System-Level Implementations of an Image Enhancement Algorithm, Proc. 8th International Symposium on Applied Reconfigurable Computing (ARC 2016), Mangaratiba, RJ, Brazil, March 2016, Springer LNCS 9625, pp. 245-257
• M. Weinhardt, R. Höckmann, Th. Kinder: High-Level Design of Portable and Scalable FPGA Accelerators, Proceedings of the First International Workshop on FPGAs for Software Programmers (FSP 2014), Munich, Germany, Sept. 2014
• M. Weinhardt, A. Krieger, Th. Kinder: A Framework for PC Applications with Portable and Scalable FPGA Accelerators, Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig 2013), Cancun, Mexiko, Dec. 2013, © 2013 IEEE¹
• M. Weinhardt: Teaching Hardware/Software Codesign on a Reconfigurable Computing Platform, Proceedings of the 8th International Symposium on Applied Reconfigurable Computing (ARC 2012), Hong Kong, China, March 2012, Springer LNCS
• E. Schüler, M. Vorbach, F. May, and M. Weinhardt: Dynamic Reconfiguration for Irregular Code using FNC-PAE Processor Cores, Proceedings of the 18th Reconfigurable Architectures Workshop (RAW 2011), Anchorage, USA, May 2011
• M. Weinhardt, M. Vorbach, V. Baumgarte, and F. May: Using Function Folding to Improve Silicon Efficiency of Reconfigurable Arithmetic Arrays, Proceedings of the IEEE International Conference on Field-Probrammable Technology FPT'04, Brisbane, Australia, Dec. 2004
• J. M. P. Cardoso and M. Weinhardt: From C Programs to the Configure-Execute Model, Proceedings Design, Automation and Testin Europe (DATE'03), Munich, Germany, March 2003
• J. M. P. Cardoso and M. Weinhardt: XPP-VC: A C Compiler with Temporal Partitioning for the PACT-XPP Architecture, Proceedings of the 12th International Conference on Field-Programmable Logic and Applications FPL'2002, LNCS, Springer-Verlag
• J. G. F. Coutinho, W. Luk and M. Weinhardt: Optimizing Parallel Programs for Hardware Implementation, Proceedings SPIE 4867, 60 (2002): Reconfigurable Technology: FPGAs and Reconfigurable Processors for Computing and Communications IV, Boston, MA, USA, July 2002
• J. M. P. Cardoso and M. Weinhardt: Fast and Guaranteed C Compilation onto the PACT-XPP Reconfigurable Computing Platform, Proceedings of IEEE Symposium on Field-Programmable Custom Computing Machines FCCM'02, Napa, CA, April 2002
• M. Weinhardt and W. Luk: Task-Parallel Programming of Reconfigurable Systems, Proceedings of the 11th International Conference on Field-Programmable Logic and Applications FPL'2001, LNCS 2147, Springer-Verlag
• V. Baumgarte, F. May, A. Nückel, M. Vorbach, and M. Weinhardt: PACT XPP - A Self-Reconfigurable Data Processing Architecture, Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA'2001), Las Vegas, USA, June 2001
• M. Weinhardt and W. Luk: Evaluating Hardware Compilation Techniques, Proceedings of IEEE Symposium on Field-Programmable Custom Computing Machines FCCM'00, Napa, CA, April 2000
• M. Weinhardt and W. Luk: Pipeline Vectorization for Reconfigurable Systems, Proceedings of IEEE Symposium on Field-Programmable Custom Computing Machines FCCM'99, Napa, CA, April 1999
• M. Weinhardt and W. Luk: Memory Access Optimization and RAM Inference for Pipeline Vectorization, Proceedings of the 9th International Workshop on Field-Programmable Logic and Applications FPL'99, LNCS 1673, Springer-Verlag
• M. Weinhardt and W. Luk: Synthesis and Implementation of Pipeline Circuits on Partially Reconfigurable FPGAs, Proceedings of Workshop on Reconfigurable Computing at PACT'98 (Intern. Conf. on Parallel Architectures and Compilation Techniques), Paris, France, Oct. 1998
• M. Weinhardt: Compilation and Pipeline Synthesis for Reconfigurable Architectures, in "Reconfigurable Architectures - High Performance by Configware", ITpress Verlag (Proceedings RAW'97, Geneva, April 1, 1997)
• M. Weinhardt: Portable Pipeline Synthesis for FCCMs, Proceedings of 6th International Workshop on Field-Programmable Logic and Applications, Aug. 1996, LNCS 1142, Springer-Verlag,
• M. Weinhardt: Computing Weight Distributions of Binary Linear Block Codes on a CCM, Proceedings of 6th International Workshop on Field-Programmable Logic and Applications, Aug. 1996, LNCS 1142, Springer-Verlag
• M. Weinhardt: CCM-Programmierung mit Pipeline-Parallelität (in German), GI/ITG Workshop Custom Computing, Juni 1996, Schloß Dagstuhl, in: Chemnitzer Informatik-Berichte CSR-96-05
• M. Weinhardt: Integer Programming for Partitioning in Software Oriented Codesign, Proceedings of 5th International Workshop on Field-Programmable Logic and Applications, LNCS 975, Springer-Verlag
• U. Aßmann, M. Weinhardt: Interprocedural Heap Analysis for Parallelizing Imperative Programs, Programming Models for Massively Parallel Computers, Berlin, Germany, Sept. 1993

¹ © 2013 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.

• M. Weinhardt: Challenges of Advancing Coarse-Grained Reconfigurable Arrays from Embedded to High-Performance Computing, Invited Talk at "2nd International Workshop on Coarse-Grained Reconfigurable Architectures for High-Performance Computing" (CGRA4HPC'23), co-located with IPDPS'23, St. Petersburg/FL, USA, May 15, 2023
• M. Weinhardt: An Industrial Case Study on Data Visualization combining CPU, FPGA and GPU with the SAccO Interface, Thematic Session on Small-Scale Heterogeneous Multiprocessing, HiPEAC Computing Systems Week, Athens, Greece, Oct. 10, 2014
• M. Weinhardt: Configurable Computing (Or, what to do with soft computer hardware), MCFA news, Newsletter of the Marie Curie Fellowship Association, Summer 2000, Vol. 2, No. 2
• M. Weinhardt: Übersetzungsmethoden für struktruprogrammierbare Rechner (Compilation techniques for structurally programmable compters, in German), PhD thesis, Universität Karlsruhe, July 1997 (published by Logos Verlag Berlin, Germany, 1997; preliminary version here)
• M. Weinhardt: Pipeline Synthesis and Optimization for Reconfigurable Custom Computing Machines, Interner Bericht 1/97, Fakultät für Informatik, Universität Karlsruhe; also presented at poster session of 5th ACM/SIGDA Int. Symposium on FPGAs, Monterey, CA, Feb. 1997